Status Report of the System Development Group

by Shin'ichi HAMA

1. New K-4 Input Interface

New K-4 VLBI input interface which has multi-bit sampling capability, is under development. Input interface corresponds to the formatter in Mark-III system. Fig.1 shows its block diagram. Sampling in 1, 2, 4 and 8 bits is possible. The number of channel can be 1, 2, 4, 8 or 16. As the total bit rate is 256Mbps, the bandwidth of each video channel depends on their combination, though video bandwidth wider 20MHz is not easy to achieve. It is planned to have a complete version in 1993. The system is to be used for VSOP (Space VLBI in Japan) and IRIS-P experiments.

2. K-4 Correlator

The K-4 data processor is not for routine process but for R&D experiments such as multi-bit sampling, detection of milli-second pulsar timing. And it will be a test version of the correlator for regular VLBI including IRIS-P. Test model of K-4 correlator is being developed by making use of LCA (FPGA produced by Xilinx Co.). It is a simple one unit correlator but can process 2 bit sampling data.

Figure 1. New K-4 Input Interface with Multi-Bit Sampling.

Return to CONTENTS